Novel Transistor Gain Cell With Feedback

The Problem:

Embedded memories, typically implemented with a 6T SRAM bitcell consume an ever growing share of the total silicon area and power. Gain cell embedded DRAM (GC-eDRAM) is
an alternative to 6T SRAM, offering higher density, lower leakage, and 2-port operation. However, gain cells:

• Rely on dynamic storage,
• Results in very low data retention times
• Increases the power consumption
• Reduces memory availability

The Solution:

We propose a novel memory macro suitable for deeply scaled CMOS technologies and high-bandwidth applications.

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